SystemVerilog FrameWorks™ VMM Template Generator
SystemVerilog FrameWorks™ Template Generator is a tool for generating a detailed boilerplate for a VMM based verification environment from scratch based on user input.
Click here to generate the VMM 1.2 boilerplate: VMM 1.2 Template Generator
Click here to generate the VMM 1.1 boilerplate: VMM 1.1 Template Generator
Click here to generate the VMM 1.0 boilerplate: VMM 1.0 Template Generator
Features:
-Support for both VMM 1.1 and VMM 1.0 (New)
VMM 1.1 features incorporated:
-RAL
-Subenv
-Data Stream Scoreboard
-Consensus
-vmm_test
-MultiStream Scenario and MultiStream Scenario Generator
- Generates Paradigm Works best practice VIPs
- Generates code that allows user defined base classes
- Generates code that work with Synopsys and Mentor simulators
- Includes makefile that operates with Synopsys and Mentor simulators
- Options for controlling the name of the project, tests, VIPs, etc.
The generated code can be compiled with the following tools/versions:
VMM 1.0 Template Generator
- Synopsys VCS 2006.06-SP2 and later versions
- Mentor QuestaSim-64 vsim 6.4a and later(needs VMM2OVM-1.0.1-E and later versions)
- VMM1.0 and later versions
VMM 1.1 Template Generator
- Synopsys VCS 2006.06-SP2 and later versions
- Mentor QuestaSim-64 vsim 6.4a and later(needs VMM2OVM-1.1 and later versions)
- VMM1.1 and later versions
VMM 1.2 Template Generator (Beta)
- Synopsys VCS 2006.06-1 tested
Click here to generate the VMM 1.2 boilerplate: VMM 1.2 Template Generator
Click here to generate the VMM 1.1 boilerplate: VMM 1.1 Template Generator
Click here to generate the VMM 1.0 boilerplate: VMM 1.0 Template Generator
Do not hesitate to contact svf-tg@paradigm-works.com if you have any comments and/or suggestions.
To read the SNUG San Jose 2007 paper about this tool, please click the following links:
Snug SanJose 2007 Presentation